Date: 17 November 2014
1015 Support for high DPI screens using oversized fonts has been reviewed and improved.
1335 PCB NC drill layer pair reports now correctly report layer spans for blind/buried via holes, when layers are shuffled out of default order.
1381 Export to AutoCAD now correctly includes thru-hole pad geometries and holes.
1382 After certain editing sequences the PCB editor would incorrectly switch to masking the display, this no longer occurs.
1408 IDF export now includes an option to export in Unicode format.
1615 Changing PCB layer names could result in layer-related lists populating incorrectly and certain outputs not generating correctly, this has been
2613 A Vault Content Cart can now target regular folders.
2816 It is now possible to define a CmpLib Component Naming scheme using a template with values from any parameter, for example
2817 The CmpLib editor now supports the addition of new parameters via customizable parameter list templates. Click the Required Models/Parameters Add
button to access the templates (samples are stored in the \Templates folder).
2855 Duplicate UniqueIDs are detected by the Schematic compiler and detailed in the Messages panel. Existing duplicate UIDs are also automatically
resolved during document loading.
2910 Release Notes column is now available when using Vault-based libraries in the Libraries panel.
3006 The Component Cuts Wire mode now functions correctly when the Always Drag option is enabled.
3008 OutputJob Editor enhanced by the addition of: mouse wheel scrolling scroll bars when not all Jobs/Containers are visible, drag and to change
Job order, multi-Job Enable/Disable right-click commands shortcuts (select the container first).
3026 Import and Export options are now directly accessible via the Files menu. Save As commands are now used exclusively for Altium file formats.
(BC:1812, BC:2731 partial)
3033 Gerber X2 is now available as an output format. It supports output generation via the PCB editor Fabrication Outputs menu, or via an
3035 IPC-2581B is now available as an output format. Install the extension and generate output via the PCB editor Fabrication Outputs menu, or via an
OutputJob. Download a free viewer from http://www.ipc2581.com/index.php/ipc-2581-files
3081 The Vaults panel now supports changing the column visibility and order. These changes, along with panel-section resize actions are retained
3143 Timeout errors after releasing project documents to a Vault have been fixed.
3188 OutputJobs now support using a slash character in the Output Container Name.
3189 It is now possible to pre-configure the display state of Vault component parameters, via the Vault Folder Properties dialog (Type =
altium-component-library) and the Vault Library dialog (add a Vault as a Library).
3205 Switching from the logical to the physical tab of a schematic no longer leaves artifacts on the screen.
3225 Schematic dragging has been further developed to improve wire/bus bending and reduce the likelihood of a netlist change.
3227 Schematic dragging has been further developed to improve object handling and the quality of the result, and reduce the likelihood of a netlist
3232 Polygon vertex deletion using Ctrl+Hover+Click is now working correctly. Hold the left mouse button down as you click, until the vertex
3251 Releasing projects to the vault with file-locking being enabled works correctly now
3272 The schematic library editor panel now supports standard copy and paste shortcuts, Ctrl+C and Ctrl+V.
3293 BOM filters no longer mix up the parameters. Note that for an existing BOM the filters must be cleared, the BOM saved, closed and re-opened, and
the filters re-defined.
3338 Multi-net routing no longer s a clearance violation at corners when the Converge shortcut (C) is pressed.
3341 When a PDF is generated from a schematic that includes a hyperlink, clicking the hyperlink now opens the target web page correctly.
3357 Tear removal speed has been improved.
3381 Second click to select an individual segment in a schematic wire now works correctly.
3412 The issue with not being able to close documents having "=" character in their name has been resolved
3419 When the Interactive Router is in push mode, a via on the pushing net can push other-net objects, including vias.
3423 A specific Verilog HDL project would cause an AV on compile, this no longer occurs.
3425 from Libraries now correctly preserves existing location and orientation of parameter strings.
3437 2D and 3D PCB view orientations are now completely separate, each retains the previous orientation and zoom when switching between the views.
3441 Pin-pairs have been added to the PCB editor, delivering the ability to define the path and constraints for a signal to travel between a source
and destination, through termination components and y-splits.
3442 The import of complex arc shapes from AutoCAD has been improved.
3443 The PCB Editor now supports embedding OLE objects, such as Word or Excel documents, into a PCB document (Place В» Object from File).
3456 Xilinx Vivado toolchain is now correctly detected, and can also be added manually in the FPGA - Place and Route preference settings.
3457 Split plane editing could occasionally cause an exception, this no longer occurs.
3459 When a wire is placed perpendicular to multiple schematic pins and then dragged, a wire segment is automatically added between every pin and the
wire being dragged. This fix restores previous schematic editing behavior.
3477 Schematic library editor, the Parameter Manager now supports editing parameters across multiple selected components.
3492 A warning is displayed when you attempt to complete an invalid blanket (has intersecting edges) in the schematic editor.
3495 PCB component fanout now functions correctly when there is an unpoured polygon under the component.
3497 Click and drag to move a group of selected objects now be functions correctly.
3498 An exception that occurred during import of specific DxDesigner projects has been resolved.
3514 PCB Step model import has been enhanced with better support for curved shapes.
3521 Fileless editing of an external SIM model no longer generates an AV.
3528 AVS 1.1 is now supported by Altium Designer 14.3.
3529 Component pads placed on a signal layer other than top or bottom could not be edited in certain layer-stack configurations, this no longer
3530 Top and Bottom Solder Mask layers are now included in the PCB Filter panel's Layer list.
3546 The IPC Footprint Wizard now previews 2-pin and 3-pin DFN component correctly.
3551 Schematic auto-junctions now size correctly regardless of the wire width.
3556 Component primitives placed on mechanical layer 17 or higher now have their layer displayed correctly in the Components mode of the PCB Panel.
3560 It is now possible to connect to an SVN repository with a user name containing the @ character.
3561 The correct Lifecycle and Naming Schema is now being loaded during CmpLib file-less editing.
3567 Model selection -downs in the CmpLib editor now display the Lifecycle state in color.
3568 The Vaults panel now shows the Note data from the correct Lifecycle state.
3576 PDF generated by running OutputJob can be opened directly from OutputJob document
3577 Simulation model pin mapping now works correctly in the CmpLib editor.
3585 Pin swapping was not correctly generating an ECO after performing PCB pin swapping, this has been resolved.
3592 The path tracing routines used for creating a polygon from selected primitives have been improved, to better handle small objects and multiple
3598 From-To panel now shows length taking via heights into account
3611 The schematic Place Wire command now correctly retains the corner mode used in the previous wire placement.
3626 Vault-defined part choice currencies are now used in Altium Designer supplier dialogues
3633 Updating Altium Designer from an NIS no longer requires a current Portal connection.
3634 "Access denied" error when installing an from NIS has been resolved
3640 Support for rectangular-shaped pad holes has been added
3664 PCB exception while re-building a net to an arc center point in a specific design no longer occurs.
3681 Plane connects (thermal reliefs) are now shown correctly when board is flipped
3689 Exception no longer occurs when choosing PCB font style in VariantManager (BC:4664)
3692 Pads with rotated square holes no longer show copper still being present after running the Remove Unused Pad Shape command.
3695 GOST specific documents can now be generated in BOM Report outputs
3707 "No model link found for component" error no longer occurs while editing old cmplib files
3708 Clicking on a supplier part number in the Vaults panel no longer causes an exception.
3721 Occasional exceptions during a print preview no longer occur.
3722 Under certain conditions changes made in the Variant Management dialog could cause an exception, this no longer occurs.
3729 The Variant Management dialog now immediately reflects changes to components, such as clearing or choosing an Alternate Part, improving
3732 The Edit action is now available when right-clicking in the Search results panel in the VaultExplorer
3736 Fixed error while releasing Vault revisions with extra long file and path names
3737 Changes to Comment and Description are no longer lost during component release from the CmpLib editor
3739 A Length column has been added to the Primitives table in the Nets view of the PCB panel
3755 Scope section of the Tears dialog was modified to distinguish TH and SMD pads
3757 Duplicate Port UIDs no longer cause Port names to be changed when generating a PDF from the schematic.
3774 Under certain conditions, schematic compile masks did not exclude components or net objects underneath them, this has been resolved.
3778 On a schematic with a lot of wiring, placing a wire with the Break Wires at Autojunction option enabled was very slow, this has been
3779 Improved performance of selection and zooming in Schematic in comparison with 14.3
3785 Under certain conditions it was possible to get the PCB Layer Stack Manager graphical representation out of sync with the tabular layer detail
region, this has been resolved.
3787 The "Print as a single job" option in Output Job File documents now properly combines the separate documents to a single print output
3789 PCB re-annotation on a variant design with not-fitted parts could result in the varied parts becoming out of sync, this no longer occurs. Note:
PCB re-annotation on a design that uses alternate parts with different footprints is not yet supported.
3792 STEP models from Inventor 2014 are now loaded without errors
3800 Variant PCB drawing options have been d to make it easier to understand how Not Fitted components are displayed.
3809 It is now possible to specify different values for solder mask expansions for top and bottom layers
3834 Empty surface constructs are now suppressed in ODB++ fabrication output.
3835 The IPC footprint wizard now correctly supports defining PLCC packages with different D and E pin counts, allowing packages with any even number
of pins to be d.
3836 Dragging multiple schematic wire ends could occasionally result in one wire being shorter than the rest, this no longer occurs.
3841 Reset All command added to the Variant Manager, use this to restore all parameters to alternate or base component values.
3844 The issue resulting in "I/O error 103" error message when some of the project files are read-only has been resolved
3845 The speed of updating from libraries or a has been improved for designs that include variants using alternate parts.
3849 In certain circumstances a component would still be shown as varied after resetting parameter variations, this has been resolved.
3857 Polygon management was improved in comparison with 14.3 (restored shelving, modified concept)
3875 The Vaults panel right-click menus now display correctly when Display scaling is being used.
3876 Elements of the Vaults panel were being compressed when Display scaling is being used, this no longer occurs.
3888 Crash reports can now be send from behind a proxy
3889 Simulation Waveform viewer print preview issue has been fixed.
3900 Class generation settings are now stored for device sheets (BC:3840)
3903 The time to open the PCB Classes dialog has been substantially reduced, particularly on designs with a large number of classes.
3972 ODB++ output did not generate drill data for drill holes included in a panel, when none of the embedded boards had drill holes, this has been
3984 Drawing of Schematic Blanket directives has been further optimized to get them to draw quickly and also correctly display the fill color.
4005 Variant designs that include alternate parts with different footprints can now be re-annotated in the PCB editor.
4016 PCB DRC now supports stacked alternate parts in a variant-based design.
4049 Signal length column was added to Nets panel (this length is being calculated using more precise xSignal engine)
4062 All extensions within a group can now be installed in a single action.
4069 Some PCB dialogs were ignoring the board units and always displaying in mils, this no longer occurs.
4076 Modified Polygon rule support check for shelved polygons
4083 During import of a P-CAD PCB file the layer types are now correctly detected and assigned for all possible layer configurations.
4092 The DRC Violations Display page of the Preferences dialog now displays the complete list of Display Style entries when Windows display scaling is
4098 An AV could occur while placing a pin in a schematic library and pressing Esc to quit the command, this no longer happens.
4111 With a specific combination of preferences, placing a component from the schematic libraries panel could cause Altium Designer to crash, this no
4121 After configuring components for pin swapping, it is no longer necessary for the designer to manually recompile the design to make those swap
4133 Changes made in the FPGA Signal Manager are now correctly added to the constraint file.
4135 Silk to Solder Mask design rule now correctly detects both silk to solder mask or silk to copper rule check configurations.
4215 When a polygon is shelved, connections d by the polygon are maintained internally so the connection lines will not be displayed.
4351 NIOS II CPU does not generates with Altera Quartus version 13.0 or later